Quad 3-State Buffer, OE LOW
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The 74LVC125A provides four independent buffers with three state outputs. Each output is independently controlled by an associated output enable pin (OE) which places the device in the high impedance state when driven high. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowing this device to be used in a mixed-voltage environment. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output preventing damaging current backflow when the device is powered down.
Number of Gates | 4 |
---|---|
Family | LVC |
VCC Min (V) | 1.65 V |
VCC Maximum Rating | 5.5 V |
tpd max @ (1.5V) | - ns |
tpd max @ 1.8V (ns) | 11.8 ns |
tpd max @ 2.5V (ns) | 5.8 ns |
tpd max @ 3.3V (ns) | 4.6 ns |
tpd max @ 5.0V (ns) | - ns |
Input/ Output Current | 24 |
Description | QUAD 2 Input 3-State Buffer OE Low |
Output Type | 3-State |
A PCN may only apply to specific orderable part numbers in this datasheet. Please refer to the corresponding PCN to see the exact orderable part number(s) affected.
PCN # | Issue Date | Implementation Date | Subject |
---|---|---|---|
PCN-2512 | 2021-04-16 | 2021-07-16 | Qualified Additional Assembly & Test (A/T) Site |