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SOT563.pngNRND = Not Recommended for New Design
COMPLEMENTARY PAIR ENHANCEMENT MODE MOSFET
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This new generation 60V N+P channel enhancement mode MOSFET has been designed to minimise RDS(on) and yet maintain superior switching performance. This device is ideally suited to Handheld application
| Compliance (Only Automotive supports PPAP) | On Request |
|---|---|
| CISS Condition @|VDS| (V) | 25, 25 |
| CISS Typ (pF) | 30, 25 |
| Compliance (Only Automotive(Q) supports PPAP) | Standard |
| ESD Diodes (Y|N) | No |
| |IDS| @TA = +25°C (A) | 0.5, 0.36 |
| PD @TA = +25°C (W) | 0.45 |
| Polarity | N+P |
| QG Typ @ |VGS| = 4.5V (nC) | 0.3, 0.28 |
| AEC Qualified | Yes |
| RDS(ON)Max@ VGS(10V)(mΩ) | 1700, 4000 |
| RDS(ON)Max@ VGS(4.5V)(mΩ) | 3000, 6000 |
| |VDS| (V) | 60, 60 |
| |VGS| (±V) | 20, 20 |
| |VGS(TH)| Max (V) | 2.5, 3 |
A PCN may only apply to specific orderable part numbers in this datasheet. Please refer to the corresponding PCN to see the exact orderable part number(s) affected.
| PCN # | Issue Date | Implementation Date | Subject |
|---|---|---|---|
| PCN-2495 | 2021-03-31 | 2021-07-01 | Qualification of Additional Assembly & Test Sites and Additional Wafer Back Grinding and Back Metal Process Source for Select Discrete Products |
| PCN-2425 | 2019-10-04 | 2020-01-04 | Qualification of Additional Wafer Solderable Front Metal Plating, Back Grinding and Back Metal Process Source, and Additional Wafer Source for Select Products. |
