NRND = Not Recommended for New Design
Wide Range 3.0V - 5.5V PLL Clock Multiplier
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The PT7C4511 is a high-performance frequency multiplier that integrates Analog Phase Lock Loop techniques.
The PT7C4511 is the most cost-effective way to generate a high-quality, high-frequency clock output from a lower frequency crystal or clock input. It is designed to replace crystal oscillators in most electronic systems, clock multiplier, and frequency translation.
Using Phase-Locked-Loop (PLL) techniques, the device uses a standard fundamental mode, inexpensive crystal to produce output clocks up to 200MHz.
The PT7C4511 is a high-performance frequency multiplier, different popular multiplication factors, allowing one chip to output many common frequencies.
The device also has an Output Enable pin that tri-states the clock output when the OE pin is taken low. This product is intended for clock generation and frequency translation with low output jitter (variation in the output period).
Compliance (Only Automotive(Q) supports PPAP) | Standard |
---|---|
Supply Voltage (V) | 3.3, 5 |
Additive Jitter (ps) | 100 |
Skew (PS) | 0 |
Maximum Output Frequency (MHz) | 200 |
Input Type(s) | Crystal, LVTTL, LVCMOS |
Output Type(s) | LVCMOS |
Number of Outputs | 2 |
Function | Generator |
Ambient or Junction Temperature (°C) | -40 to 85 |
Additional Technical Documents are available upon request:
Application information, Evaluation board, and Other technical documents
A PCN may only apply to specific orderable part numbers in this datasheet. Please refer to the corresponding PCN to see the exact orderable part number(s) affected.
PCN # | Issue Date | Implementation Date | Subject |
---|---|---|---|
PCN-2651 | 2023-11-13 | 2023-11-13 | Qualified Additional Fab Source, Assembly Test Sites, Die Revision, BOM, Datasheet, Tape and Reel Packing Quantity. |
PCN-2642 | 2023-09-05 | 2024-03-05 | Device End of Life (EOL) |