I2C/I3C/SPI

I2C (IIC)

The I²C (IIC) interface is a synchronous serial communication protocol bus that can communicate between multiple controllers, such as an MCU (primary), and single or multiple lower-speed target peripheral devices (secondary). It uses two wires, SCL (serial clock line) and SDA (bidirectional serial data line), to communicate.

Each secondary device has a unique address. The I²C bus can support up to 128 devices. Data on the I2C-bus can be transferred at a rate of 100 kbit/s in the standard-mode and up to 400 kbit/s in the fast-mode.

I3C (IIIC)

I³C (IIIC) also uses SCL and SDA, is backward compatible with most I²C devices, but improves upon the features and performance of its predecessor. Some enhancements I3C brings over I2C include, but are not limited to:

I³C has a Standard Data Rate (SDR) of up to 12.5 Mbit/s.
I³C has lower power consumption due to its push-pull implementation compared to traditional I2C’s open-drain interface.
The I³C controller assigns dynamic addresses to peripheral devices during bus initialization, which reduces the risk of address collision.

SPI

The SPI (serial peripheral interface), with its four-wire chip select (CS), Serial Input Data (SI), Serial Output Data (SO), and Clock (CLK), offers a versatile communication solution primarily in embedded systems. It leverages the chip select line to enable communication with the specific device you intend to interact with.

Data on the SPI-bus can be transferred at a rate of 20MHz (typical) and up to 50MHz.