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*---------- DMTH31M1LPSWQ Spice Model ----------
.SUBCKT DMTH31M1LPSWQ 10 20 30 
* TERMINALS : D G S
* MODEL FORMAT : SPICE3
* Editor : Stan Li
M1 1 2 3 3 NMOS L = 1E-006 W = 1E-006 
RD 10 1 0.0003313 
RS 30 3 0.0001 
RG 20 2 0.19 
CGS 2 3 5.743E-009 
EGD 12 0 2 1 1 
VFB 14 0 0 
FFB 2 1 VFB 1 
CGD 13 14 2.13E-009 
R1 13 0 1 
D1 12 13 DLIM 
DDG 15 14 DCGD 
R2 12 15 1 
D2 15 0 DLIM 
DSD 3 10 DSUB 
.MODEL NMOS NMOS LEVEL = 3 VMAX = 1E+005 ETA = 0 VTO = 2.326 
+ TOX = 1E-007 NSUB = 6.249E+015 KP = 500 U0 = 1000 KAPPA = 0.2 IS = 0 
.MODEL DCGD D CJO = 1.399E-009 VJ = 1.97 M = 0.9 
.MODEL DSUB D IS = 1.126E-008 N = 1.338 RS = 4.441E-010 BV = 35.68 
+ CJO = 9.296E-009 VJ = 8 M = 0.6674 XTI = 0 
.MODEL DLIM D IS = 0.0001 
.ENDS
*Diodes Spice Model v1.2 Last Revised 2024/08/20
*The model is an approximation of the device, and it may not show the true device performance under all conditions.
*The model only guarantees the accuracy of the key parameters (Ron, VSD, IDSS, Ciss, Coss, Crss, and Trr) at 25 degC in the current data sheet.