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DMN3009LFV

30V N-CHANNEL ENHANCEMENT MODE MOSFET

Datasheet

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Description

This new generation MOSFET is designed to minimize the on-state resistance (RDS(ON)) and yet maintain superior switching performance, making it ideal for high-efficiency power management applications.

Feature(s)

Low RDS(ON) – ensures on state losses are minimized
Small form factor thermally efficient package enables higher density end products
Occupies just 33% of the board area occupied by SO-8 enabling smaller end product

Application(s)

Power Management Functions
DC-DC Converters
Backlighting

Product Specifications

Product Parameters

AEC Qualified	Yes
Compliance (Only Automotive(Q) supports PPAP)	Standard
Polarity	N
ESD Diodes (Y\|N)	No
\|V_DS\| (V)	30 V
\|V_GS\| (±V)	20 ±V
\|I_DS\| @T_C = +25°C (A)	60
P_D @T_A = +25°C (W)	2
R_DS(ON)Max@ V_GS(10V)(mΩ)	5.5 mΩ
R_DS(ON)Max@ V_GS(4.5V)(mΩ)	9 mΩ
\|V_GS(TH)\| Max (V)	3 V
Q_G Typ @ \|V_GS\| = 4.5V (nC)	20 nC
Q_G Typ @ \|V_GS\| = 10V (nC)	42 nC
C_ISS Typ (pF)	2000 pF
C_ISS Condition @\|V_DS\| (V)	15 V

Technical Documents

SPICE Model

DMN3009LFV.spice.txt

Recommended Soldering Techniques

TN1.pdf

Product Change Notices (PCNs)

A PCN may only apply to specific orderable part numbers in this datasheet. Please refer to the corresponding PCN to see the exact orderable part number(s) affected.

PCN #	Issue Date	Implementation Date	Subject
PCN-2601	2022-10-28	2023-01-28	Additional Wafer Source for Select Discrete Products
PCN-2425	2019-10-04	2020-01-04	Qualification of Additional Wafer Solderable Front Metal Plating, Back Grinding and Back Metal Process Source, and Additional Wafer Source for Select Products.