Image shown is for reference only. Actual package may vary. Refer to the product data sheet for package details.

SOT563.png

Back to MOSFET Master Table

DMN63D8LV

DUAL N-CHANNEL ENHANCEMENT MODE MOSFET

Datasheet

Contact Sales

Description

This new generation MOSFET has been designed to minimize the on-state resistance (R_DS(on)) and yet maintain superior switching performance, making it ideal for high efficiency power management applications.

Application(s)

DC-DC Converters
Power management functions
Battery Operated Systems and Solid-State Relays
Drivers: Relays, Solenoids, Lamps, Hammers, Displays, Memories, Transistors, etc

Product Specifications

Product Parameters

AEC Qualified	Yes
Compliance (Only Automotive(Q) supports PPAP)	Standard
Polarity	N+N
ESD Diodes (Y\|N)	Yes
\|V_DS\| (V)	30 V
\|V_GS\| (±V)	20 ±V
\|I_DS\| @T_A = +25°C (A)	0.26
P_D @T_A = +25°C (W)	0.45
R_DS(ON)Max@ V_GS(10V)(mΩ)	2800 mΩ
R_DS(ON)Max@ V_GS(4.5V)(mΩ)	4200 mΩ
R_DS(ON)Max@ V_GS(2.5V)(mΩ)	13000 mΩ
\|V_GS(TH)\| Max (V)	1.5 V
Q_G Typ @ \|V_GS\| = 4.5V (nC)	0.43 nC
Q_G Typ @ \|V_GS\| = 10V (nC)	0.87 nC
C_ISS Typ (pF)	22 pF

Technical Documents

SPICE Model

DMN63D8LV.spice.txt

Recommended Soldering Techniques

TN1.pdf

RoHS CofC

RoHSFile

Product Change Notices (PCNs)

A PCN may only apply to specific orderable part numbers in this datasheet. Please refer to the corresponding PCN to see the exact orderable part number(s) affected.

PCN #	Issue Date	Implementation Date	Subject
PCN-2495	2021-03-31	2021-07-01	Qualification of Additional Assembly & Test Sites and Additional Wafer Back Grinding and Back Metal Process Source for Select Discrete Products