P-CHANNEL ENHANCEMENT MODE MOSFET
Contact Sales
Log in or register to manage email notifications about changes to datasheets or PCNs for this part.
This 3rd generation Lateral MOSFET (LD-MOS) is engineered to minimize on-state losses and switch ultra-fast, making it ideal for high efficiency power transfer. It uses Chip-Scale Package (CSP) to increase power density by combining low thermal impedance with minimal RDS(ON) per footprint area.
| AEC Qualified | No |
|---|---|
| Compliance (Only Automotive(Q) supports PPAP) | Standard |
| Polarity | P |
| ESD Diodes (Y|N) | Yes |
| |VDS| (V) | 8 V |
| |VGS| (±V) | 6 ±V |
| |IDS| @TA = +25°C (A) | 16 |
| PD @TA = +25°C (W) | 2.2 |
| RDS(ON)Max@ VGS(4.5V)(mΩ) | 5.7 mΩ |
| RDS(ON)Max@ VGS(2.5V)(mΩ) | 9.1 mΩ |
| |VGS(TH)| Min (V) | 0.4 V |
| |VGS(TH)| Max (V) | 1.1 V |
| QG Typ @ |VGS| = 4.5V (nC) | 9.5 nC |
| CISS Typ (pF) | 952 pF |
| CISS Condition @|VDS| (V) | 4 V |
