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PI6CB184Q

4-Output PCIe 4.0 Clock Buffer for Automotive Applications

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Description

The PI6CB184Q is an 4-output very low power PCIe Gen1/Gen2/Gen3/Gen4 clock buffer. It takes an reference input to fanout four 100MHz low power differential HCSL outputs with on-chip terminations. The on-chip termination can save 16 external resistors and make layout easier. Individual OE pin for each output provides easier power management.

It uses Diodes proprietary PLL design to achieve very low jitter that meets PCIe Gen1/Gen2/Gen3/Gen4 requirements. Other than PCIe 100MHz support, this device also support Ethernet application with 50MHz or 125MHz via SMBus. It provides various options such as different slew rate and amplitude through strapping pins or SMBUS so that users can configure the device easily to get the optimized performance for their individual boards. This device is optimized for Automotive designs.

Feature(s)

  • 1.8V supply voltage
  • HCSL input: 100MHz, also suppport 50MHz or 125MHz via SMBus
  • 4 differential low power HCSL outputs with on-chip termination
  • Individual output enable
  • Programmable Slew rate and output amplitute for each output
  • Differential outputs blocked until PLL is locked
  • Strapping pins or SMBus for configuration;
  • 3.3V tolerant SMBus interface support
  • Very low jitter outputs
    • Differential cycle-to-cycle jitter <50ps
    • Differential output-to-output skew <50ps
    • PCIe Gen1/Gen2/Gen3/Gen4 compliant

Product Specifications

Product Parameters

Compliance (Only Automotive(Q) supports PPAP) Automotive
Function Zero-Delay Buffer
Number of Outputs 4
Output Type(s) LP-HCSL
Maximum Output Frequency (MHz) 100
Additive Jitter (ps) 0.1
Supply Voltage (V) 1.8
Input Type(s) HCSL
Skew (PS) 50
Ambient or Junction Temperature (°C) -40 to 105

Technical Documents

Application Information

SPICE/IBIS Model Documents

Recommended Soldering Techniques

TN1.pdf