PI7C9X113SL

Description

PI7C9X113SL is a PCIe-to-PCI/PCI-X bridge. PI7C9X113SL is compliant with the PCI Express Base Specification, Revision 1.1, the PCI Express Card Electromechanical Specification, Revision 1.1, the PCI Local Bus Specification, Revision 3.0 and PCI Express to PCI/PCI-X Bridge Specification, Revision 1.0. PI7C9X113SL supports transparent mode operation and forward bridging. PI7C9X113SL has an x1 PCI Express upstream port and a 32-bit PCI downstream port. The 32-bit PCI downstream port is 66MHz capable (see Figure 1-1). PI7C9X113SL configuration registers are backward compatible with existing PCI bridge software and firmware. No modification of PCI bridge software and firmware is needed for the original operation.

Features

• Forward bridging (PCI Express as primary bus, PCI as secondary bus)
• x1 PCI Express interface (2.5Gb/s data rate)
• 32-bit PCI interface capable of 66MHz
• GPIO support (4 bi-directional pins). When external arbiter is used, 3 additional GPI (input) and GPO (output) pins
• Power Management (including ACPI, PCI_PM, CLKRUN_L and CLKREQ_L,)
• Transparent mode support
• Subtractive Decoding PCI-to-PCI bridge to support legacy device
• Masquerade support (user-defined vendor, device, revision, subsystem device, and subsystem vendor ID)
• EEPROM (I2C) Interface
• SM Bus Interface
• 10k byte buffer: 2K byte buffer for downstream memory read, 4K bytes for upstream memory read, and 2K byte buffer for memory write in both directions
• Auxiliary powers (VAUX, VDDAUX, VDDCAUX) support
• Power consumption less than 350 mW in typical condition
• Industrial temperature range (-40C to 85C)