Low Quiescent Programmable-Delay Supervisory
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The PT7M3808G family of microprocessor supervisory circuits monitor system voltage form 0.4V to 5.0V, asserting an open-drainRESET signal when the SENSE voltage drops below a preset threshold or when the manual reset (MR ) pin drops to a logic low. The RESET output remains low for the user-adjustable delay time after the SENSE voltage and manual reset (MR ) return above the respective thresholds.
Fixed Detect Voltages (V) | 0.405, 0.84, 1.12, 1.4, 1.67, 2.33, 2.79, 3.07, 4.65 V |
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Adjustable Detect Voltage Reference Voltage (V) | N/A V |
Number of Channels | 1 |
Minimum Operating Voltage (V) | 0.4, 0.9 V |
Maximum Input Voltage (V) | 6.5 V |
Quiescent Current (µA) | 2.8 µA |
Typical Time Delay (µs) | N/A µs |
Reset Period (ms) | Adjustable ms |
RESET Output (Active High) | No (Active High) |
RESET Output (Active Low) | Yes (Active Low) |
Manual RESET | Yes |
Watchdog | N/A |
Watchdog Time (s) | N/A s |
Power Fail Comparator Threshold (V) | N/A V |
Reset Output Topology | Open-Drain |
Ambient Temperature Range (°C) | -40 to 125 °C |
Additional Technical Documents are available upon request:
Application information, Evaluation board, and Other technical documents
A PCN may only apply to specific orderable part numbers in this datasheet. Please refer to the corresponding PCN to see the exact orderable part number(s) affected.
PCN # | Issue Date | Implementation Date | Subject |
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PCN-2603 | 2023-03-20 | 2023-06-20 | Qualified Additional Wafer Fab Source (SFAB2/JKFAB), Die Revision, Bill of Material |
PCN-2510 | 2021-02-26 | 2021-05-26 | Qualified Additional A/T Sites, Fab Site and Data Sheet Change |