Active Capacitor Discharge Circuit Considerations for FPGAs
The multiple power rails of today’s FPGAs and high-performance processors must be powered up and powered down in strict sequence. The decoupling capacitors normally attached to the power rails must be actively discharged, to ensure proper control of the power-down sequence and to complete power-down in an acceptable time. This article describes the principles and design of active discharge circuitry, and explains selection criteria for key components such as power MOSFETs to ensure repeatable performance and reliability.
