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DMP2101UCB9 (Obsolete)

DUAL P-CHANNEL ENHANCEMENT MODE MOSFET

Datasheet

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Description

This new generation MOSFET is designed to minimize the on-state resistance (RD1D2(ON)) and yet maintain superior switching performance, making it ideal for high-efficiency power management applications.

Feature(s)

LD-MOS Technology with the Lowest Figure of Merit:

RD1D2(ON) = 63mΩ to Minimize On-State Losses
Qg = 3.2nC for Ultra-Fast Switching

VGS(TH) = -0.74V Typ. for a Low Turn-On Potential
CSP with Footprint 1.5mm × 1.5mm
Height = 0.62mm for Low Profile
Gate ESD Protection <HBM Class 3A>
Totally Lead-Free & Fully RoHS Compliant
Halogen and Antimony Free. “Green” Device

Application(s)

Battery Management
Load Switch
Battery Protection

Product Specifications

Product Parameters

Compliance (Only Automotive supports PPAP)	Standard
C_ISS Condition @\|V_DS\| (V)	10
C_ISS Typ (pF)	392
Compliance (Only Automotive(Q) supports PPAP)	Standard
ESD Diodes (Y\|N)	Yes
\|I_DS\| @T_A = +25°C (A)	3.2
P_D @T_A = +25°C (W)	1.56
Polarity	P+P
Q_G Typ @ \|V_GS\| = 4.5V (nC)	3.2
AEC Qualified	No
R_DS(ON)Max@ V_GS(1.8V)(mΩ)	175
R_DS(ON)Max@ V_GS(2.5V)(mΩ)	130
R_DS(ON)Max@ V_GS(4.5V)(mΩ)	100
\|V_DS\| (V)	20
\|V_GS\| (±V)	6
\|V_GS(TH)\| Max (V)	0.9
\|V_GS(TH)\| Min (V)	0.4

Technical Documents

SPICE Model

DMP2101UCB9.spice.txt

Recommended Soldering Techniques

TN1.pdf

Product Change Notices (PCNs)

A PCN may only apply to specific orderable part numbers in this datasheet. Please refer to the corresponding PCN to see the exact orderable part number(s) affected.

PCN #	Issue Date	Implementation Date	Subject
PCN-2556	2021-11-22	2022-05-22	Device End of Life (EOL)