Single 2 Input NAND Gate
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The 74LVC1G00 is a single 2-input positive NAND gate with a standard totem pole output. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowing this device to be used in a mixed voltage environment. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output preventing damaging current backflow when the device is powered down.
Compliance (Only Automotive supports PPAP) | Standard |
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Description | NAND Gate, 2 Input |
Family | LVC |
VCC Min (V) | 1.65 |
VCC Max (V) | 5.5 |
Output Type | Push-Pull |
tpd max @ 1.8V (ns) | 9 |
tpd max @ 2.5V (ns) | 5.5 |
tpd max @ 3.3V (ns) | 4.7 |
tpd max @ 5.0V (ns) | 4 |
Output Current (mA) | 32 |
Packages | SOT25, SOT353, SOT553, X2-DFN0808-4, X2-DFN1010-6, X2-DFN1409-6, X2-DFN1410-6 |
A PCN may only apply to specific orderable part numbers in this datasheet. Please refer to the corresponding PCN to see the exact orderable part number(s) affected.
PCN # | Issue Date | Implementation Date | Subject |
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PCN-2299 | 2018-03-01 | 2018-06-01 | Additional Qualified (A/T) Assembly Test Site |