Image shown is for reference only. Actual package may vary. Refer to the product data sheet for package details.
SO-8EP-package-image.png3.8V TO 40V INPUT, 5A LOW IQ SYNCHRONOUS BUCK
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The AP64500 is a 5A, synchronous buck converter with a wide input voltage range of 3.8V to 40V. The device fully integrates a 45mΩ highside power MOSFET and a 20mΩ low-side power MOSFET to provide high-efficiency step-down DC-DC conversion.
The AP64500 device is easily used by minimizing the external
component count due to its adoption of peak current mode control.
The AP64500 design is optimized for Electromagnetic Interference (EMI) reduction. The device has a proprietary gate driver scheme to resist switching node ringing without sacrificing MOSFET turn-on and turn-off times, which reduces high-frequency radiated EMI noise caused by MOSFET switching. AP64500 also features Frequency Spread Spectrum (FSS) with a switching frequency jitter of ±6%, which reduces EMI by not allowing emitted energy to stay in any one frequency for a significant period of time.
The device is available in an SO-8EP package.
| Compliance(Only Automotive supports PPAP) | Standard |
|---|---|
| Type | Buck |
| Minimum Input Voltage (V) | 3.8 |
| Maximum Input Voltage (V) | 40 |
| Output Current (A) | 5 |
| Minimum Output Voltage (V) | 0.8 |
| Maximum Output Voltage (V) | VIN |
| Quiescent Current Typ (µA) | 25 |
| Shutdown Current Typ (µA) | 1 |
| Frequency Typ (kHz) | 100,2200 Adj. |
| HS RDS(ON) (mΩ) | 45 |
| LS RDS(ON) (mΩ) | 20 |
| Features | Enable,Light Load Efficiency,Soft-start Fixed,Frequency Adjustable,External Clock Synchronization,External Loop Compensation,UVLO Adjustable,Frequency Spread Spectrum,OVP,Overcurrent Protection,Thermal Shutdown,Synchronous Rectification |
A PCN may only apply to specific orderable part numbers in this datasheet. Please refer to the corresponding PCN to see the exact orderable part number(s) affected.
| PCN # | Issue Date | Implementation Date | Subject |
|---|---|---|---|
| PCN-2520 | 2021-05-27 | 2021-08-27 | Qualified Additional Bump Site and Assembly/Test (A/T) Sites |
