Diodes Incorporated — Analog and discrete power solutions
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DMN16M0UCA6

N-CHANNEL ENHANCEMENT MODE MOSFET

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Description

This new generation MOSFET is designed to minimize the on-state resistance (RSS(ON)) yet maintain superior switching performance, making it ideal for high-efficiency power management applications.

Feature(s)

  • CSP with Footprint 2.11mm × 1.18mm
  • Height = 0.11mm for Low Profile
  • ESD Protection of Gate

Application(s)

  • Battery Management
  • Load Switch
  • Battery Protection

Product Specifications

Product Parameters

AEC Qualified No
Compliance (Only Automotive(Q) supports PPAP) Standard
Polarity N+N
ESD Diodes (Y|N) Yes
|VDS| (V) 12 V
|VGS| (±V) 8 ±V
|IDS| @TA = +25°C (A) 17
PD @TA = +25°C (W) 2.6
RDS(ON)Max@ VGS(4.5V)(mΩ) 5.9 mΩ
RDS(ON)Max@ VGS(2.5V)(mΩ) 11 mΩ
|VGS(TH)| Min (V) 0.4 V
|VGS(TH)| Max (V) 1.3 V
QG Typ @ |VGS| = 4.5V (nC) 24 nC

Related Content

Packages

Applications

Technical Documents

SPICE Model

Recommended Soldering Techniques

TN1.pdf

RoHS CofC

Product Change Notices (PCNs)

A PCN may only apply to specific orderable part numbers in this datasheet. Please refer to the corresponding PCN to see the exact orderable part number(s) affected.

PCN # Issue Date Implementation Date Subject
PCN-2647 2023-10-12 2024-01-12 Back Metal Composition Change for Select Discrete Products
PCN-2474 2020-12-16 2021-03-16 Qualification of Additional Wafer Source for Select Discrete Products
PCN-2456 2020-05-29 2020-08-29 Qualification of Internal "Diodes Technology (Cheng Du) Company Limited" (CAT) as an Additional Assembly & Test Site Using Copper or Palladium Coated Copper Bond Wire with Standardization of Assembly Bill of Materials, Or as an Additional Wafer Plating, Back Grinding and Back Metal Process Source, and Qualification of Additional Wafer Source for Select Discrete Products.