P-CHANNEL ENHANCEMENT MODE MOSFET
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This 3rd generation Lateral MOSFET (LD-MOS) is engineered to minimize on-state losses and switch ultra-fast, making it ideal for high efficiency power transfer. It uses Chip-Scale Package (CSP) to increase power density by combining low thermal impedance with minimal RDS(ON) per footprint area.
AEC Qualified | No |
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Compliance (Only Automotive(Q) supports PPAP) | Standard |
Polarity | P |
ESD Diodes (Y|N) | Yes |
|VDS| (V) | 8 V |
|VGS| (±V) | 6 ±V |
|IDS| @TA = +25°C (A) | 13.2 |
PD @TA = +25°C (W) | 1.53 |
RDS(ON)Max@ VGS(4.5V)(mΩ) | 5.7 mΩ |
RDS(ON)Max@ VGS(2.5V)(mΩ) | 9.1 mΩ |
|VGS(TH)| Min (V) | 0.4 V |
|VGS(TH)| Max (V) | 1.1 V |
QG Typ @ |VGS| = 4.5V (nC) | 8.2 nC |
CISS Typ (pF) | 900 pF |