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DMP4015SK3

P-CHANNEL ENHANCEMENT MODE MOSFET

Datasheet

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Description

This new generation MOSFET is designed to minimize the on-state resistance (R_DS(ON)) yet maintain superior switching performance, making it ideal for high-efficiency power-management applications.

Feature(s)

100% Unclamped Inductive Switch (UIS) test in production
Low On-Resistance
Fast Switching Speed
Lead-Free Finish; RoHS Compliant (Notes 1 & 2)
Halogen and Antimony Free. “Green” Device (Note 3)
This part is qualified to JEDEC standards (as references in AEC-Q) for High Reliability. https://www.diodes.com/quality/product-definitions/
An automotive-compliant part is available under separate datasheet (DMP4015SK3Q)

Application(s)

DC-DC converters
Power-management functions
Backlighting

Product Specifications

Product Parameters

AEC Qualified	Yes
Compliance (Only Automotive(Q) supports PPAP)	Standard
Polarity	P
ESD Diodes (Y\|N)	No
\|V_DS\| (V)	40 V
\|V_GS\| (±V)	25 ±V
\|I_DS\| @T_A = +25°C (A)	14
P_D @T_A = +25°C (W)	3.5
R_DS(ON)Max@ V_GS(10V)(mΩ)	11 mΩ
R_DS(ON)Max@ V_GS(4.5V)(mΩ)	15 mΩ
\|V_GS(TH)\| Max (V)	2.5 V
Q_G Typ @ \|V_GS\| = 4.5V (nC)	47.5 (@5V) nC
C_ISS Typ (pF)	4234 pF

Technical Documents

SPICE Model

DMP4015SK3.spice.txt

Recommended Soldering Techniques

TN1.pdf

RoHS CofC

RoHSFile

Product Change Notices (PCNs)

A PCN may only apply to specific orderable part numbers in this datasheet. Please refer to the corresponding PCN to see the exact orderable part number(s) affected.

PCN #	Issue Date	Implementation Date	Subject
PCN-2425	2019-10-04	2020-01-04	Qualification of Additional Wafer Solderable Front Metal Plating, Back Grinding and Back Metal Process Source, and Additional Wafer Source for Select Products.