Image shown is for reference only. Actual package may vary. Refer to the product data sheet for package details.

SO-8.png

Back to MOSFET Master Table

DMP6110SSS

P-CHANNEL ENHANCEMENT MODE MOSFET

Datasheet

Contact Sales

Description

This MOSFET has been designed to minimize the on-state resistance (R_DS(ON)) and yet maintain superior switching performance, making it ideal for high efficiency power management applications.

Application(s)

Backlighting
Power Management Functions
DC-DC Converters

Product Specifications

Product Parameters

AEC Qualified	Yes
Compliance (Only Automotive(Q) supports PPAP)	Standard
Polarity	P
ESD Diodes (Y\|N)	No
\|V_DS\| (V)	60 V
\|V_GS\| (±V)	20 ±V
\|I_DS\| @T_A = +25°C (A)	4.5
P_D @T_A = +25°C (W)	2
R_DS(ON)Max@ V_GS(10V)(mΩ)	110 mΩ
R_DS(ON)Max@ V_GS(4.5V)(mΩ)	130 mΩ
\|V_GS(TH)\| Max (V)	3 V
Q_G Typ @ \|V_GS\| = 4.5V (nC)	9.5 nC
Q_G Typ @ \|V_GS\| = 10V (nC)	19.4 nC
C_ISS Typ (pF)	1030 pF

Technical Documents

SPICE Model

DMP6110SSS .spice.txt

Recommended Soldering Techniques

TN1.pdf

Product Change Notices (PCNs)

A PCN may only apply to specific orderable part numbers in this datasheet. Please refer to the corresponding PCN to see the exact orderable part number(s) affected.

PCN #	Issue Date	Implementation Date	Subject
PCN-2425	2019-10-04	2020-01-04	Qualification of Additional Wafer Solderable Front Metal Plating, Back Grinding and Back Metal Process Source, and Additional Wafer Source for Select Products.