Diodes Incorporated — Analog and discrete power solutions
PowerDI3333 8

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DMT10H072LFV

100V N-CHANNEL ENHANCEMENT MODE MOSFET

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Description

This new generation MOSFET is designed to minimize the on-state resistance (RDS(ON)) and yet maintain superior switching performance, making it ideal for high-efficiency power management applications.

Feature(s)

  • Low RDS(ON) – Ensures On-State Losses are Minimized
  • Small Form Factor Thermally Efficient Package Enables Higher Density End Products
  • Occupies just 33% of the Board Area Occupied by SO-8 Enabling Smaller End Product
  • Low On-Resistance

Application(s)

  • Power Management Functions
  • Battery Operated Systems and Solid-State Relays
  • Drivers: Relays, Solenoids, Lamps, Hammers, Displays, Memories, Transistors, etc.

Product Specifications

Product Parameters

AEC Qualified No
Compliance (Only Automotive(Q) supports PPAP) Standard
Polarity N
ESD Diodes (Y|N) No
|VDS| (V) 100 V
|VGS| (±V) 20 ±V
|IDS| @TA = +25°C (A) 4.7
|IDS| @TC = +25°C (A) 20
PD @TA = +25°C (W) 2
PD @TC = +25°C (W) 37.8
RDS(ON)Max@ VGS(10V)(mΩ) 62 mΩ
RDS(ON)Max@ VGS(4.5V)(mΩ) 109 mΩ
|VGS(TH)| Max (V) 2.8 V
QG Typ @ |VGS| = 4.5V (nC) 2.5 nC
QG Typ @ |VGS| = 10V (nC) 4.5 nC
CISS Typ (pF) 228 pF
CISS Condition @|VDS| (V) 50 V

Technical Documents

SPICE Model

Recommended Soldering Techniques

TN1.pdf

Product Change Notices (PCNs)

A PCN may only apply to specific orderable part numbers in this datasheet. Please refer to the corresponding PCN to see the exact orderable part number(s) affected.

PCN # Issue Date Implementation Date Subject
PCN-2425 2019-10-04 2020-01-04 Qualification of Additional Wafer Solderable Front Metal Plating, Back Grinding and Back Metal Process Source, and
Additional Wafer Source for Select Products.