DUAL N-CHANNEL ENHANCEMENT MODE MOSFET
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This MOSFET is designed to minimize the on-state resistance (RDS(ON)) yet maintain superior switching performance, making it ideal for high-efficiency power-management applications.
AEC Qualified | Yes |
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Compliance (Only Automotive(Q) supports PPAP) | Standard |
Polarity | N+N |
ESD Diodes (Y|N) | No |
|VDS| (V) | 60 V |
|VGS| (±V) | 20 ±V |
|IDS| @TA = +25°C (A) | 9.2 |
|IDS| @TC = +25°C (A) | 33.2 |
PD @TA = +25°C (W) | 2.5 |
PD @TC = +25°C (W) | 37.5 |
RDS(ON)Max@ VGS(10V)(mΩ) | 19 mΩ |
RDS(ON)Max@ VGS(4.5V)(mΩ) | 28 mΩ |
|VGS(TH)| Max (V) | 2.5 V |
QG Typ @ |VGS| = 4.5V (nC) | 8.4 nC |
QG Typ @ |VGS| = 10V (nC) | 17 nC |
CISS Typ (pF) | 864 pF |
CISS Condition @|VDS| (V) | 30 V |
A PCN may only apply to specific orderable part numbers in this datasheet. Please refer to the corresponding PCN to see the exact orderable part number(s) affected.
PCN # | Issue Date | Implementation Date | Subject |
---|---|---|---|
PCN-2495 | 2021-03-31 | 2021-07-01 | Qualification of Additional Assembly & Test Sites and Additional Wafer Back Grinding and Back Metal Process Source for Select Discrete Products |
PCN-2439 | 2019-12-05 | 2020-03-05 | Qualification of "Diodes Technology (Cheng Du) Company Limited" (CAT) as an Additional Assembly & Test Site, Using Gold Bond Wire, and as an Additional Wafer Back Grinding and Back Metal Process Source on Select MOSFET Products |