N-CHANNEL ENHANCEMENT MODE VERTICAL DMOS FET
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This MOSFET is designed to minimize the on-state resistance (RDS(ON)) yet maintain superior switching performance, making it ideal for high-efficiency power-management applications.
| AEC Qualified | Yes |
|---|---|
| Compliance (Only Automotive(Q) supports PPAP) | Standard |
| Polarity | N |
| ESD Diodes (Y|N) | No |
| |VDS| (V) | 80 V |
| |VGS| (±V) | 20 ±V |
| |IDS| @TA = +25°C (A) | 10.3 |
| |IDS| @TC = +25°C (A) | 53.7 |
| PD @TA = +25°C (W) | 3.1 |
| PD @TC = +25°C (W) | 83.3 |
| RDS(ON)Max@ VGS(10V)(mΩ) | 17 mΩ |
| RDS(ON)Max@ VGS(4.5V)(mΩ) | 23.5 mΩ |
| |VGS(TH)| Max (V) | 3 V |
| QG Typ @ |VGS| = 4.5V (nC) | 15 nC |
| QG Typ @ |VGS| = 10V (nC) | 34 nC |
| CISS Typ (pF) | 1949 pF |
| CISS Condition @|VDS| (V) | 40 V |
A PCN may only apply to specific orderable part numbers in this datasheet. Please refer to the corresponding PCN to see the exact orderable part number(s) affected.
| PCN # | Issue Date | Implementation Date | Subject |
|---|---|---|---|
| PCN-2439 | 2019-12-05 | 2020-03-05 | Qualification of "Diodes Technology (Cheng Du) Company Limited" (CAT) as an Additional Assembly & Test Site, Using Gold Bond Wire, and as an Additional Wafer Back Grinding and Back Metal Process Source on Select MOSFET Products |
