Image shown is for reference only. Actual package may vary. Refer to the product data sheet for package details.

X2-DFN1010-6.png

Image shown is for reference only. Actual package may vary. Refer to the product data sheet for package details.

X2-DFN1410-6.png

X2-DFN0910-6.jpg

Back to Logic Master Table

74AUP2G3404

Dual 1 Buffer and 1 Inverter

Contact Sales

Description

The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications. The 74AUP2G3404 has one buffer and one inverter. Both gates have push-pull outputs designed for operation over a power supply range of 0.8V to 3.6V. The device is fully specified for partial power down applications using I_OFF. The I_OFF circuitry disables the output preventing damaging current backflow when the device is powered down.

Application(s)

Suited for battery and low power needs
Wide array of products such as:

- PCs, networking, Notebooks, Netbooks, PDAs

- Tablet Computers, E-Readers

- Computer Peripherals, Hard Drives, CD/DVD ROM

- TV, DVD, DVR, Set Top Box

- Cell Phones, Personal Navigation / GPS

- MP3 players ,Cameras, Video Recorders

Product Specifications

Product Parameters

Function	Inverter/Buffer
Type	Buffers/Inverters/Transceivers
Compliance (Only Automotive supports PPAP)	Standard
Channels	2
Family	AUP
VCC Min (V)	0.8
VCC Max (V)	3.6
Input Type	Standard CMOS
Output Type	Push-Pull
Output Current (mA)	4

Technical Documents

Recommended Soldering Techniques

TN1.pdf

Product Change Notices (PCNs)

A PCN may only apply to specific orderable part numbers in this datasheet. Please refer to the corresponding PCN to see the exact orderable part number(s) affected.

PCN #	Issue Date	Implementation Date	Subject
PCN-2299	2018-03-01	2018-06-01	Additional Qualified (A/T) Assembly Test Site