74LVC2G38

Dual 2 Input NAND Logic Gates Open Drains

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Description

The 74LVC2G38 is a dual two input NAND buffer gate with open-drain outputs. Both gates have push-pull outputs designed for operation over a power supply range of 1.65V to 5.5V. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output preventing damaging current backflow when the device is powered down.

Feature(s)

Wide Supply Voltage Range from 1.65 to 5.5V
± 24mA Output Drive at 3.3V
CMOS low power consumption
IOFF Supports Partial-Power-Down Mode Operation
Inputs accept up to 5.5V
Schmitt Trigger Action at all inputs make the circuit tolerant for slower input rise and fall time. The hysteresis is typically 65 mV at VCC = 3.0V
ESD Protection Exceeds JESD 22
2000-V Human Body Model (A114)
Exceeds 1000-V Charged Device Model (C101)
Latch-Up Exceeds 70mA per JESD 78, Class I
Leadless Packages Named per JESD30E
Totally Lead-Free & Fully RoHS Compliant
Halogen and Antimony Free. “Green” Device

Application(s)

General Purpose Logic
Power Down Signal Isolation
Wide array of products such as:
- PCs, networking, notebooks, netbooks, PDAs
- Tablet Computers, E-readers
- Computer peripherals, hard drives, CD/DVD ROM
- TV, DVD, DVR, set top box
- Cell Phones, Personal Navigation / GPS
- MP3 players ,Cameras, Video Recorders

Product Specifications

Product Parameters

Function	NAND
Type	Logic Gates
Compliance (Only Automotive supports PPAP)	Standard
Channels	2
Family	LVC
VCC Min (V)	1.65
VCC Max (V)	5.5
Input Type	Standard CMOS
Output Type	Open-Drain
Output Current (mA)	32

Technical Documents

Recommended Soldering Techniques

TN1.pdf