PI6ULS5V9517B (Not Recommended for New Design (NRND))

Description

The PI6ULS5V9517B is a CMOS integrated circuit intended for I²C-bus or SMBus applications. It can provide level shifting between low voltage (down to 0.8 V) and higher voltage (2.2 V to 5.5 V) in mixed-mode applications. And it enables I²C and similar bus system to be extended, without degradation of performance even during level shifting.

The PI6ULS5V9517B enables the system designer to isolate two halves of a bus for both voltage and capacitance, accommodating more I²C devices or longer trace length. It also permits extension of the I²C-bus by providing bidirectional buffering for both the data (SDA) and the clock (SCL) lines, thus allowing two buses of 400pF to be connected in an I²C application.

Feature(s)

• 2 channel, bidirectional buffer 
• I²C-bus and SMBus compatible
• Port A operating voltage range: 0.8V to 5.5V
• Port B operating voltage range: 2.2V to 5.5V
• Voltage level translation from 0.8V to 5.5V and from 2.2V to 5.5V
• Active HIGH repeater enable input
• Open-drain input/outputs
• Lock-up free operation
• Supports arbitration and clock stretching across the repeater
• Accommodates Standard-mode and Fast-mode I2C-bus devices and multiple masters
• Powered-off high-impedance I²C-bus pins
• 5.5V tolerant I²C-bus and enable pins
• 0Hz to 400kHz clock frequency (the maximum system operating frequency may be less than 400kHz because of the delays added by the repeater)
• ESD protection exceeds 8000V HBM per JESD22-A114
• Packages offered: MSOP-8L, TDFN-8 2*3-8L

Application(s)

• PC
• Server
• Networking
• Docking