NRND = Not Recommended for New Design
Quad Flow through Receiver
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The PI90LV048A/PI90LVT048A quad flow-through differential line receivers are designed for applications requiring ultra low-power dissipation and high data rates. The device is designed to support data rates in excess of 500 Mbps (250 MHz) using Low Voltage Differential Signaling (LVDS) technology.
The devices accept low-voltage (350 mV typical) differential input signals and translates them to 3V CMOS output levels. The receiver supports a 3-state function, which may be used to multiplex outputs, and also supports open, shorted and terminated (100-ohms) input fail- safe. The receiver output will be HIGH for all fail-safe conditions.
PI90LVT048A features integrated parallel termination resistors (nominally 110-ohms) that eliminate the requirement for four dis- crete termination resistors and reduce stud length. PI90LV048A inputs are high impedance and require an external termination resistor when used in a point-to-point connection. The devices have a flow-through pinout for easy PCB layout.
The EN and EN inputs are ANDed together and control the 3-state outputs. The enables are common to all four receivers. The PI90LV048A and companion LVDS line driver (eg. PI90LV047A) provide a new alternative to high-power PECL/ECL devices for high-speed point-to-point interface applications.
Signal Converter (From) | LVDS |
---|---|
Signal Converter (To) | LVTTL |
Drive Capability | N/A |
Bits Needed | 4 |
Max Frequency (Mbps) | 660 |
Temp | Industrial Temp (-40C to +85C) |
Additional Technical Documents are available upon request:
Application information, Evaluation board, and Other technical documents
A PCN may only apply to specific orderable part numbers in this datasheet. Please refer to the corresponding PCN to see the exact orderable part number(s) affected.
PCN # | Issue Date | Implementation Date | Subject |
---|---|---|---|
PCN-2428 | 2019-11-12 | 2020-02-12 | Assembly & Test Site Porting from OSE to Greatek |